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ZL40121 Low Power, Current Feedback Dual Operational Amplifier
Data Sheet Features
* * * * * 280MHz small signal bandwidth 1100V/s slew rate 3.3mA/channel static supply current 60Mhz gain flatness to +/- 0.1dB 8 pin SOIC Ordering Information ZL40121/DCA ZL40121/DCB (tubes) 8 lead SOIC (tape and reel) 8 lead SOIC
April 2003
-40C to +85C The 280MHz Av=+1V/V small signal bandwidth and 1100V/s slew rate make the device an excellent solution for component video applications such as driving RGB signals down significant cable lengths. Other applications which may take advantage of the ZL40121 dynamic performance features and matched amplifiers include low cost high order active filters and twisted pair driver/receivers.
Applications
* * * * * Video switchers/routers Video line drivers Twisted pair driver/receiver Active filters Cable drivers
Description
The ZL40121 is a low power, dual, current feedback operational amplifier offering high performance at a low cost. The device provides a very high output current drive capability of 65mA while requiring only 3.3mA of static supply current per channel. This feature makes the ZL40121 the ideal choice where a high density of high speed devices is required.
Out_1
1
8 V+ 7 Out_2
In_n_1 2
1
In_p_1 3 6 In_n_2
2
V- 4
ZL40121
5 In_p_2
Figure 1 - Functional Block Diagram and Pin Connection
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ZL40121
Application Notes
Current Feedback Op Amps Current feedback op amps offer several advantages over voltage feedback amplifiers: * * * AC bandwidth not dependent on closed loop gain High Slew Rate Fast settling time
Data Sheet
The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance amplifier which can be considered to have gain
Z( f ) =
Zo f 1+ j f o
where Zo is the DC gain. It can be shown that the closed loop non-inverting gain is given by
Vout = Vin
Av fR f 1+ j fZ o o
f o Z o GBOL = Rf Rf
where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by
BWCL =
and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain. This can readily be seen from the performance characteristic frequency response graph with varying Rf It can be shown that increasing the value of Rf * * * * * Increases closed loop stability Decreases loop gain Decreases bandwidth Reduces gain peaking Reduces overshoot
Using a resistor value of Rf=510 for Av=+2 V/V gives good stability and bandwidth. However since requirements for stability and bandwidth vary it may be worth some experimentation to find the optimal Rf for a given application. Layout Considerations Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence over high frequency operation for this device. This is particularly important for high performance current feedback opamps. The Zarlink evaluation board serves as a good example layout that should be copied. The following guidelines should be followed: * * * Include 6.8uF tantalum and 0.1uF ceramic capacitors on both positive and negative supplies Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitances Minimize all trace lengths to reduce series inductance
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Zarlink Semiconductor Inc.
Data Sheet Application Diagrams
ZL40121
Vcc 6.8uF
* * *
Vin 0.1uF
*
1/2 ZL40121
*
Rf
Vout
Rin
*
Ra
*
0.1uF
*
6.8uF Vee
*
Vout Rf = Av = 1 + Vin Ra
Figure 2 - Non-inverting Gain *
Vcc 6.8uF
* * *
Rb 0.1uF Vout
1/2 ZL40121
Vin Rin
Rf
*
Ra
* *
0.1uF
*
6.8uF Vee
*
Vout Rf = Av = - Vin Ra
Figure 3 - Inverting Gain
Zarlink Semiconductor Inc.
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ZL40121
Absolute Maximum Ratings
Parameter 1 2 Vin Differential Output Short Circuit Protection Symbol VIN VOS/C Min Max 1.2 See Apps Note in this data sheet 6.5 VV2 V+ V+ (see Note 3)
Data Sheet
Units V
3 4 5 6
Supply voltage Voltage at Input Pins Voltage at Output Pins EDS Protection (HBM Human Body Model) (see Note 2) Storage Temperature Latch-up test Supply transient test
V+, VV(+IN), V(-IN) VO
V V V kV
7 8 9
Note 1:
-55
+150 (see Note 4) (see Note 5)
C
100mA
for 100ms 20% pulse for 100ms
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Human body model, 1.5k in series with 100pF. Machine model, 20in series with 100pF. 0.8kV between the pairs of +INA, -INA and +INB pins only. 2kV between supply pins, OUTA or OUTB pins and any input pin. 100mA applied to input and output pins to force the device to go into "latch-up". The device passes this test to JEDEC spec 17. Positive and Negative supply transient testing increases the supplies by 20% for 100ms.
Note 2: Note 3: Note 4: Note 5:
Operating Range
Characteristic Supply Voltage (Vcc) Operating Temperature (Ambient) Junction to Ambient resistance Min 4.0 -40 Rth(j-a) 150 Typ Max Units V C C 4 layer FR4 board C 4 layer FR4 board Comments
6.0
+85
Junction to Case resistance
Rth(j-c)
60
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Zarlink Semiconductor Inc.
Data Sheet
Rf=510, Rload=100 unless specified
ZL40121
Electrical Characteristics - Vcc=5V, Tamb=25C(typ.),Tamb=-40C to +85C(min-max), Av=+2V/V,
Min /Max -40 to +85C
Characteristic
Conditions
Typ 25C
Min/ Max 25C
Units
Test Type1
Frequency Domain Response -3dB Bandwidth Av=+1; Vo < 0.5Vp-p; Rf=1.5k Av=+2; Vo < 0.5Vp-p; Rf=510 Av=+2; Vo < 5Vp-p; Rf=510 +/- 0.1dB Flatness Differential Gain (NTSC) Differential Phase (NTSC) Time Domain Response Rise and Fall Time Vout=0.5V Step Vout=5V Step Settling Time to 0.1% Overshoot Slew Rate Noise and Distortion
2nd Harmonic Distortion 3nd Harmonic Distortion Equivalent Input Noise Voltage Non-Inverting Current Inverting Current >1MHz >1MHz >1MHz 6.4 1.0 9.3 Vout=2Vp-p, 1MHz Vout=2Vp-p, 1MHz -78 -88 dBc dBc C C 1.4 3.6 6 6 1100 ns ns ns % V/s C C C C C 280 230 130 60 0.02 0.06 MHz MHz MHz MHz % deg. C C C C C C
Av=+2; Vo < 0.5Vp-p; Rf=510 Rload=150 Rload=150
Vout=2V Step Vout=0.5V Step Vout=5V Step
nV Hz pV Hz pA Hz
C C C
Static, DC Performance Input Offset Voltage Average Drift Input Bias Current - Non-inverting
Average Drift 1.4 1.3 6.0 2.6 7.5 15 2.8 2.6 mV uV/deg. C uA nA/deg. C A C A C
Zarlink Semiconductor Inc.
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ZL40121
Min/ Max 25C
14 63 58 54 4.5
Data Sheet
Min /Max -40 to +85C
15 16 62 56 53 4.7
Characteristic
Conditions
Typ 25C
Units
Test Type1
Input Bias Current - Inverting Average Drift Power Supply Rejection Ratio (+ve) Power Supply Rejection Ratio (-ve) Common Mode Rejection Ratio Supply Current (per Channel) DC DC DC Quiescent
4.4 65 62 57 3.3
uA nA/deg. C dB dB dB mA
A C A A A A
Miscellaneous Performance
Input Resistance (Non-inverting) Input Capacitance (Non-inverting) Common Mode Input Range Output Voltage Range Output Current (max) Output Resistance, Closed Loop DC Rload=100 19.0 1 2.3 2.8 65 110 2.2 2.7 1.9 2.6 M pF V V mA m C C A A C C
NOTE 1: Test Types: (A) 100% tested at 25C. Over temperature limits are set by characterization and simulation. (B) Limits set by characterization or simulation. (C) Typical value only for information.
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Zarlink Semiconductor Inc.
Data Sheet
Rf=510, unless otherwise specified
ZL40121
Typical Performance Characteristics - Tamb=25degC, Vsupply= 5V, Rload=100, Av=+2V/V,
Non-Inverting Frequency Response
2 0 -2 Normalised Gain (dB) -4 Phase -6 -8 -10 -12 -14 1 10 Frequency (MHz) 100 Vo = 0.5Vp-p Av =+4 Rf = 150 0 -50 -100 -150 -200 1000 Av =+8 Rf = 200 Gain Av =+2 Rf = 510 Av =+1 Rf = 1.1k 200 150 100 50
Zarlink Semiconductor Inc.
Phase (deg.)
7
ZL40121
Data Sheet
Non-Inverting Frequency Response varying Rf
2 0 -2 Normalised Gain (dB) -4 -6 -8 -10 -12 -14 -16 -18 10 100 Frequency (MHz) 1000 Vo=0.5Vp-p Rf=700 Rf=510 Rf=390 Rf=250
Frequency Response for Varying Rload
2 0 RL = 1k -2 Gain (dB) -4 RL = 25 -6 -8 -10 10 100 Frequency (MHz) 1000 Vo = 0.5V p-p RL = 100
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Zarlink Semiconductor Inc.
Data Sheet
ZL40121
Large Signal Gain
0 -2 -4 Gain (dB) -6 -8 -10 -12 -14 -16 10 100 Frequency (MHz) 1000 Vo = 4V p-p Vo = 5V p-p Vo = 2V p-p Vo = 1V p-p
Harmonic Distortion vs Frequency
-40
Vo = 2V p-p
2nd & 3rd Harmonic Distortion (dBc) -50
-60
2nd Harmonic
-70
-80
-90
3rd Harmonic
-100 1 10 Frequency (MHz) 100
Zarlink Semiconductor Inc.
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ZL40121
Data Sheet
Open Loop Transimpedance Gain and Phase
120 110 Transimpedance Gain 100 90 80 70 60 50 40 1.0E+03 Transimpedance Phase Transimpedance Gain 0 -30 Transimpedance Phase -60 -90 -120 -150 -180 -210 -240 1.0E+09
1.0E+04
1.0E+05
1.0E+06 Frequency (Hz)
1.0E+07
1.0E+08
CMRR
70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC
T = + 85 degC
1.0E+04
1.0E+05
1.0E+06
1.0E+07
1.0E+08
Frequency (Hz)
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Zarlink Semiconductor Inc.
Data Sheet
ZL40121
PSRR +ve
80 T = - 40 degC 70 Rejection Ration (dB) 60 T = + 25 degC 50 40 30 20 10 0 1.0E+03 T = + 85 degC
1.0E+04
1.0E+05
1.0E+06
1.0E+07
1.0E+08
Frequency (Hz)
PSRR -ve
70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC T = + 85 degC
1.0E+04
1.0E+05
1.0E+06
1.0E+07
1.0E+08
Frequency (Hz) T
Zarlink Semiconductor Inc.
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ZL40121
Data Sheet
Input Voltage and Current Noise
100
Current Noise (pA/SQRT(Hz) Voltage Noise (nV/SQRT(Hz)
Inverting Input Current Noise 10 Input Voltage Noise 1 Non-Inverting Input Current
0.1 1.0E+01
1.0E+02
1.0E+03
1.0E+04 Frequency (Hz)
1.0E+05
1.0E+06
1.0E+07
Supply Current vs Temperature
3.55 3.50 3.45 Supply Current (mA) 3.40 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.00 -40 -20 0 20 40 60 80 100 120 140 Die Temp (deg. C)
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Zarlink Semiconductor Inc.
Data Sheet
ZL40121
DC Drift Over Temperature
5.00 4.50 Input Offset Voltage (mV) Input Bias Current (uA) 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 -40 -20 0 20 40 60 80 100 120 140 Die Temp (deg. C) Input Bias Non-Inv Input Offset Voltage Input Bias Inv
Large and Small Signal Pulse Response
3 0.6
Vout = 5V Step
2
0.4
Large Signal Vout (V)
Vout = 0.5V Step
0
0
-1
-0.2
-2
-0.4
-3 0 10 20 30 40 Time (ns) 50 60 70 80
-0.6
Zarlink Semiconductor Inc.
Small Signal Vout (V)
1
0.2
13
ZL40121
Data Sheet
Closed Loop Output Impedance
10 Closed Loop Output Impedance (Ohms)
1
0.1
0.01 0.01
0.1
1 Frequency (MHz)
10
100
Differential Gain & Phase ZL40120 / ZL40121 NTSC RL=150? 0.07 0.06 0.05 0.04 Differential Gain & Phase (?% & ?) 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.7
Best fit Gain Best fit Phase
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0 bias voltage
0.1
0.2
0.3
0.4
0.5
0.6
0.7
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Zarlink Semiconductor Inc.
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